GaN based components are booming because of the increasing interest in opto-electronic circuits, and more particularly in electro-luminescent and laser diodes which are spreading on the market.
Elsewhere there can also be noticed a significant development of power electronic circuits, in which GaN components are likely to have large part, particularly with the development of AlGaN/GaN High Electron Mobility Transistors (H.E.M.T.)
In the past, the first components which were based on GaN hetero-structures were arranged on substrates of sapphire (Al2O3) or silicon carbide (SiC). The former substrate has a low thermal conductivity thus limiting its use for power applications, while the latter substrate shows higher conductivity but at a significantly high manufacturing cost.
Research was done for substituting for those substrates other materials offering a better compromise solution between cost and conductivity and which could be used for the manufacturing of a high number of discrete individual components.
One material that was researched was a high conductive silicon substrate offering wafers of significant size and that can be produced by well known and well matured manufacturing techniques (such as deposit techniques and etching techniques).
Since the stable phase of GaN is hexagonal (wurtzite), the earlier components based on GaN which were integrated on a silicon substrate by Molecular Beam Epitaxy (MBE) or Metalorganic Vapor Phase Epitaxy (MOVPE), were achieved on a (1,1,1) oriented silicon substrate. The symmetry of the hexagonal surface facilitated the epitaxy of the stable phase of III-N components (AlN, GaN, AlGaN, etc.).
U.S. Patent Application Publication No. US2003/0136333, entitled “Preparation Method of a Coating of Gallium Nitride”, by F. Semond, J.-C. Massies, and N.-P. Grandjean, filed on Jun. 8, 2001, illustrates a technique for growth of GaN on a (1,1,1) type silicon substrate. This technique allows mass production of discrete GaN components but unfortunately does not allow the integration of such components in the traditional silicon wafer used for the integration of the usual MOS/CMOS type components, since that integration is based on a (001) orientation of the silicon substrate. As a consequence, there is no possibility of real integration with MOS/CMOS microelectronics circuits and (1,1,1) oriented silicon substrates can only serve as a support for GaN discrete components.
The (0,0,1) type silicon substrate was then the subject of extensive research in order to achieve a “real” integration of GaN components in the silicon wafers which are traditionally processed by well-known microelectronics methods and techniques.
Recent investigations showed that, if the integration of a GaN structure could be achieved on a (0,0,1) oriented substrate, such integration is limited to the sole substrates showing a significant off-orientation of the [001] axis along the [110] direction.
German Patent No. DE 100 06 108, entitled “Verfahren zur Epitaxie einkristalliner Aluminiumnitrid-Schichten”, by Lebedev V., filed on Feb. 11, 2000, illustrates the integration of a AlN hetero-structure which can be used as a support for a GaN structure on a Si (0,0,1) substrate. The substrate is deliberately subjected to a 4 to 6 degree off-orientation in order to generate terraces having bi-atomic steps instead of terraces with mono-atomic steps, so as to allow one single orientation of the bonds of the silicon atoms at the surface, which shows to be a condition for a good quality of the hetero-epitaxy process of III-V material atoms of the type (Al,Ga)N. It should be noticed that a terrace is considered to be the surface of a plane of a crystal which does not comprise any step or, also, the surface of such a plane which separates two steps.
U.S. Pat. No. 4,774,205 also illustrates the integration of a GaAs structure on a (001) silicon substrate, which is 3° off-oriented along direction [110].
The article “Metalorganic vapor phase epitaxy grown InGaN/GaN light-emitting diodes on Si(001) substrate”, by F. Schulze et al., published in Applied Physics Letters 88, 12114 (2006), discloses the realization by a technique of Metal Organic Vapor Phase Epitaxy (MOPVE) of a Light Emitting Diode (LED) structure on a (001) silicon substrate having 4° off-orientation along [110].
The article “GaAs heteroepitaxy on an epitaxial Si surface with a low-temperature process”, by Hidefurni Mori et al., published in Applied Physics Letters 63 (14), Oct. 4, 1993, discloses another known method for the growth of GaAs on a silicon substrate with an off-orientation of 0.5 degrees, used after a preliminary process (Si/Si growth) intended to stabilized the bi-atomic steps. No industrial application of this process is yet known.
The article “Growth of crack-free hexagonal GaN films on Si (100)”, by J. Wan et al., published in Applied Physics Letters 79, number 10, Sep. 3, 2001, p. 1459, discloses another method for growing Ga on silicon which is described to be applicable on silicon which is not off-oriented but which has not lead to practical application and which, furthermore, does not allow the realization of a layer of GaN showing one single crystal orientation. Particularly, the article does not describe one single orientation and it is suggested that the grains are particularly off-oriented one another in the plane of the growth because of the techniques of deposition being used, such as sputtering techniques. This method thus does not achieve high quality epitaxy.
The use of such an off-oriented substrate has allowed the manufacture of HEMT transistors having performance close to that obtained with (111) Si (S. Joblot et al., Appl. Phys. Lett. 87, 133505 (2005)/Electronics Letters 42, 117 (2006)/Superlattices and microstructures, Proceeding E-MRS 2006).
On the other hand, one notices that the off-orientation of the (001) silicon substrate is prejudicial to the realization of MOS/CMOS circuits manufactured in accordance with the techniques known in the field of microelectronics, and particularly the techniques of photolithography, etc., which are still based on a nominal substrate, that is to say a substrate having minimal off-orientation, with a value less than 0.5 degrees.
Thus, the improvements which were obtained that can be designated by “the silicon channel” do not allow the epitaxial growth of a III-V structure of quality, on a substrate which is dedicated to receive at a later stage MOS/CMOS type transistors.
Such is the problem which is solved by the present invention.